EPI Consortium members published “ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation” in the International Journal of Parallel Programming.

Here you can find a link to an open access version of the article: https://www.research-collection.ethz.ch/handle/20.500.11850/663701

DOI: 10.1007/s10766-024-00761-4

EPI Consortium members published “Xvpfloat: RISC-V ISA Extension for Variable Extended Precision Floating Point Computation” in the IEEE Transactions on Computers.

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/10488759

DOI: https://doi.org/10.1109/TC.2024.3383964

EPI Consortium members published “Sparse Matrix-Vector Multiplication Based on Online Arithmetic” in the IEEE Access.

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/abstract/document/10559968

DOI: https://doi.org/10.1109/ACCESS.2024.3416395

What We Know about Alice Recoque, Europe’s Second Exascale System

SiPearl and Samsung Form Alliance to Enhance European Processor Technologies with HBM Integration

SiPearl partners with Samsung Electronics for built-in HBM in Rhea

SiPearl partners with Samsung for built-in HBM in Rhea

SiPearl chooses Italy to open its third international subsidiary

SiPearl unveils key features of the Rhea 1 to accelerate HPC and AI inference

80 Arm Neoverse V1 cores and in-package memory for SiPearl MCU

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