EPI Consortium members published “ControlPULP: A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration” in the Lecture Notes in Computer Science.

Here you can find a link to an open access version of the article: https://www.research-collection.ethz.ch/handle/20.500.11850/580004

DOI: https://doi.org/10.1007/978-3-031-15074-6_8

EPI Consortium members published “Accelerating Variants of the Conjugate Gradient with the Variable Precision Processor” at 2022 IEEE 29th Symposium on Computer Arithmetic (ARITH).

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/abstract/document/9974436

DOI: https://doi.org/10.1109/ARITH54963.2022.00017

$400m RISC-V design centre for Barcelona

Hewlett Packard Enterprise and SiPearl Partner to Develop HPC Solutions with European Processors and Accelerate Europe’s Adoption of Exascale Supercomputers

Indigenous HPC: What It Means and Why Now

Joined up thinking: Europe to oversee trio of projects for homegrown chips, HPC gear

EuroHPC Launches 3 New Research and Innovation Projects

E4 Contributes to the Success of the European Processor Initiative

E4 helps EPI in chip and HPC independence

EPI Consortium members published “Functional verification of a RISC-V vector accelerator” in IEEE Design & Test.

Here is a link to an open-access version of the article: https://upcommons.upc.edu/handle/2117/382717.

DOI: 10.1109/MDAT.2022.3226709.

Copyright 2022 All Right Resereved

This project has received funding from the European High Performance Computing Joint Undertaking (JU) under Framework Partnership Agreement No 800928 and Specific Grant Agreement No 101036168 (EPI SGA2). The JU receives support from the European Union’s Horizon 2020 research and innovation programme and from Croatia, France, Germany, Greece, Italy, Netherlands, Portugal, Spain, Sweden, and Switzerland.

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