New RISC-V CTO On Open Source Chip Architecture’s Global Data Center Momentum
Luca Benini, University of Bologna, Italy and Frank K. Gürkaynak, ETH Zürich, Switzerland held sessions of a lecture at ACACES20 Summer School, titled “Working with RISC-V: from open ISA to open Architecture to open Hardware”, where they also touched upon their work in EPI.
Videos from the sessions are available here:
https://www.hipeac.net/acaces/2020/#/program/courses/3/downloads/
SiPearl, Arm to Present at the Open Innovation Platform Ecosystem Forum
Imen Baili from Menta presented their eFPGA technology at the SemIsrael Virtual Technology Week. The recording is available here: https://www.youtube.com/watch?v=HHCUCC6ZVZ8&list=PL56ixi__BxbcYBUt8Az0C5awTKPuuz-eB&index=16&t=0s
EPI consortium members participated in the HPC CoE meeting and gave presentations to the CoE members.
Here you can find the presentation on Co-design.
EPI Consortium members published “How Europe Is Preparing Its Core Solution for Exascale Machines and a Global, Sovereign, Advanced Computing Platform” in Math. Comput. Appl. 2020, 25, 46.
Here you can find a link to an open access version of the article:
https://www.mdpi.com/2297-8747/25/3/46
DOI: https://doi.org/10.3390/mca25030046
At the online event called International Conference on Supercomputing 2020, two EPI partners gave talks that also related to their work in EPI. Andrea Bartolini from the University of Bologna gave a talk titled “RISC-V open-ISA and open-HW – a swiss army knife for HPC”, discussing the effectiveness of RISC-V ISA and Open-HW, while Roger Espasa from SemiDynamics gave a talk titled “Hardening an academic core for industrial use”, where he discussed strategies and challenges of using open-source academic core and hardening for industrial use.
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