EPI Consortium members published “Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing” in IEEE Micro.
Here you can find a link to an open access version of the article:
https://arxiv.org/abs/2008.06502
DOI: https://doi.org/10.1109/MM.2020.3045564
Project press release, published on November 9, 2020, is also available in the news section: https://www.european-processor-initiative.eu/european-processor-initiative-second-year-of-activities
At the 2nd TA visitors meeting, John Davis from BSC held a keynote titled: LOCA: Embracing Open Source Hardware to create an Open Source Ecosystem.
RISC-V is trying to launch an open-hardware revolution
Radio Free HPC: RISC-V Deep Dive, CTO Interview
At the online event called International Conference on Supercomputing 2020, two EPI partners gave talks that also related to their work in EPI. Andrea Bartolini from the University of Bologna gave a talk titled “RISC-V open-ISA and open-HW – a swiss army knife for HPC”, discussing the effectiveness of RISC-V ISA and Open-HW, while Roger Espasa from SemiDynamics gave a talk titled “Hardening an academic core for industrial use”, where he discussed strategies and challenges of using open-source academic core and hardening for industrial use.