E4 Announces the RISC-V-Based Monte Cimone Cluster

Roger Espasa from Semidynamics held a presentation titled “OVI: The Open Vector Interface.”

EPI Consortium members published “A Lightweight Posit Processing Unit for RISC-V Processors in Deep Neural Network Applications” in IEEE Transactions on Emerging Topics in Computing.

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/9583876.

DOI: https://doi.ieeecomputersociety.org/10.1109/TETC.2021.3120538.

Jesus Labarta held a presentation titled “Performance analysis and hybrid programming in HPC”, Mauro Olivieri held a presentation “Vector acceleration in HPC and Edge Devices” and Roger Espasa held a presentation “Avispado: A RISC-V core supporting the RISC-V vector instruction set.”

Project press release, published on September 22nd, 2021, is also available in the news section: https://www.european-processor-initiative.eu/epi-epac1-0-risc-v-test-chip-samples-delivered/.

EPI Consortium members published “A RISC-V in-network accelerator for flexible high-performance low-power packet processing” in 48th IEEE/ACM International Symposium on Computer Architecture (ISCA).

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/9499874.

DOI: https://doi.org/10.1109/ISCA52012.2021.00079.

A group of authors from EPI’s partner IST presented at CARRV 2021 a paper titled “Supporting RISC-V Performance Counters through Performance analysis tools for Linux (Perf ).”

Here you can find a link to an open access version of the article: https://carrv.github.io/2021/papers/CARRV2021_paper_29_Domingos.pdf.

EPI’s Roger Espasa from SemiDynamics held a presentation titled “SemiDynamics High Bandwidth RISC-V Vector Cores.”

Project press release, published on June 1st, 2021, is also available in the news section: https://www.european-processor-initiative.eu/epi-epac1-0-risc-v-test-chip-taped-out/

Prof. Jesus Labarta from BSC attended the Open Source Summit and held a presentation titled “The RISC-V vector processor in EPI”.