This workshop was organized in the context of the “Centre of Excellence in Simulation of Weather and Climate in Europe” (ESiWACE) phase 2 and it brought together experts on Machine Learning, Exascale hardware and Programming Models at a virtual event using video conference software.
EPI’s Jean-Marc Denis from Atos and Jesus Labarta from BSC participated. Jesus Labarta presentation on EPAC is available here in the repository.

 

EPI team members participated in several sessions at the HiPEAC conference in Bologna, Italy, held from January 20-22, 2020.

In addition to having a booth as a HiPEAC sponsor, EPI was presented at the industrial session, in two other workshops (WRC and Eurolab4HPC session) and in EPI’s own tutorial session, where EPI presenters gave talks on Accelerators, Compiler and Software Development, EPI’s Power Aspect and PCIe Daughter.

This is a factsheet for domain-specific accelerator in EPI – STX (stencil/tensor accelerator).

Should you need more information, please contact us at contact[at]european-processor-initiative.eu

This is a factsheet for domain-specific accelerator in EPI – VRP (VaRiable Precision Processor).

Should you need more information, please contact us at contact[at]european-processor-initiative.eu

EPI team attended the Supercomputing conference in Denver, with its own exhibition booth and four more shared partners’ booths exhibiting EPI materials. In addition to that, EPI representatives held several presentations and invited talks:

At the Arm User Group meeting, Yingchih Yang from Atos presented the EPI Design Updated, while Dirk Pleiter from Julich presented “Linear algebra on Arm-based platforms: From Neon to SVE”. EPI Chairman of the Board, Jean-Marc Denis attended the ETP4HPC BoF with an invited talk, and also the ASC HPC Connection Workshop with a talk titled “Recent Developments on EPI Program”.

The basic information on EPI is available in this factsheet.

Should you need more information, please contact us at contact[at]european-processor-initiative.eu

 

At the 2nd RISC-V Meetings, organized by IRT Nanoelec and CEA and The Scientific Day of IRT SE & GDR SOC2: RISC-V for critical embedded systems, organized by IRT St-Exupéry and GDR SOC2, EPI partners held two presentations.

The first one made by Romain Dolbeau, who gave a talk titled “European Processor Initiative: challenges & opportunities for RISC-V accelerators in an HPC platform”, is available upon request due to file size. The second, done by Denis Dutoit, is available for download here. Ater an introduction on High Performance Computing new challenges and associated technology/architecture evolution, the presentation highlighted the EPI position statement on generic computing, accelerator with RISC-V and design methodology. The presentation concluded with an explanation of EPI’s roadmap towards a wide range of applications from Exascale computing to embedded HPC.

EPI First tutorial called “First steps towards a made-in-Europe high-performance microprocessor” was held on July 17th, at the Universita Politècnica de Catalunya, co-located with the ACM 2019 Summer school on HPC architectures for AI and dedicated applications. Mauro Olivieri presented the section about Accelerator.

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