EPI Consortium members published “AXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads” at the DATE conference 2023.

Here you can find a link to an open access version of the article: https://www.research-collection.ethz.ch/handle/20.500.11850/627328

DOI: https://doi.org/10.23919/DATE56975.2023.10137243

EPI Consortium members published “ControlPULP: A RISC-V Power Controller for HPC Processors with Parallel Control-Law Computation Acceleration” in the Lecture Notes in Computer Science.

Here you can find a link to an open access version of the article: https://www.research-collection.ethz.ch/handle/20.500.11850/580004

DOI: https://doi.org/10.1007/978-3-031-15074-6_8

EPI Consortium members published “A High-Performance, Energy-Efficient Modular DMA Engine Architecture” in the IEEE Transactions on Computers.

Here you can find a link to an open access version of the article: https://www.research-collection.ethz.ch/handle/20.500.11850/641982

DOI: https://doi.org/10.1109/TC.2023.3329930

EPI Consortium members published “ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation” in the International Journal of Parallel Programming.

Here you can find a link to an open access version of the article: https://www.research-collection.ethz.ch/handle/20.500.11850/663701

DOI: 10.1007/s10766-024-00761-4

EPI Consortium members published “A 10-core SoC with 20 Fine-Grain Power Domains for Energy-Proportional Data-Parallel Processing over a Wide Voltage and Temperature Range” in ESSCIRC 2021 – IEEE 47th European Solid State Circuits Conference (ESSCIRC).

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/9567755.

DOI: https://doi.org/10.1109/ESSCIRC53450.2021.9567755.

EPI Consortium members published “A RISC-V in-network accelerator for flexible high-performance low-power packet processing” in 48th IEEE/ACM International Symposium on Computer Architecture (ISCA).

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/9499874.

DOI: https://doi.org/10.1109/ISCA52012.2021.00079.

EPI Consortium members published “FPnew: An Open-Source Multiformat Floating-Point Unit Architecture for Energy-Proportional Transprecision Computing” in IEEE Transactions on Very Large Scale Integration (VLSI) Systems  Journal.

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/9311229.

DOI: https://doi.org/10.1109/TVLSI.2020.3044752.

EPI partners attended the 2nd RISC-V Week and gave several presentations:

Roger Espasa, SemiDynamics: “SemiDynamics’ High Bandwidth RISC-V Cores”,

Jesus Labarta, BSC: “The RISC-V vector processor in EPI“,

Luca Benini, UNIBO, ETHZ: “Seven Chips in Seven Years”,

Romain Dolbeau, SiPearl: “The road to RISC-V in High-Performance Computing”

EPI Consortium members published “An Open-Source Scalable Thermal and Power Controller for HPC Processors” in the proceedings of the 2020 IEEE 38th International Conference on Computer Design (ICCD).

Here you can find a link to an open access version of the article, which will be available upon expiration of a 6-month embargo:

https://cris.unibo.it/handle/11585/788609?mode=simple.3085

DOI: http://dx.doi.org/10.1109/ICCD50377.2020.00067

EPI Consortium members published “Manticore: A 4096-core RISC-V Chiplet Architecture for Ultra-efficient Floating-point Computing” in IEEE Micro.

Here you can find a link to an open access version of the article:

https://arxiv.org/abs/2008.06502

DOI: https://doi.org/10.1109/MM.2020.3045564

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