EPI Consortium members published “A PULP-based Parallel Power Controller for Future Exascale Systems” in the proceedings of the 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Here you can find a link to a post-peer-review, pre-copyedit version of the article:

http://hdl.handle.net/11585/718358

The final authenticated version is available online at: https://doi.org/10.1109/ICECS46596.2019.8964699

EPI team members participated in several sessions at the HiPEAC conference in Bologna, Italy, held from January 20-22, 2020.

In addition to having a booth as a HiPEAC sponsor, EPI was presented at the industrial session, in two other workshops (WRC and Eurolab4HPC session) and in EPI’s own tutorial session, where EPI presenters gave talks on Accelerators, Compiler and Software Development, EPI’s Power Aspect and PCIe Daughter.

In Pisa, the EPI team participated at the RoundTable at ApplePies, 7th International Workshop Applications in Electronics Pervading Industry, Environment & Society. The Round Table confirmed that the EuroHPC Joint Undertaking, in full alignment with the objective of deploying in Europe a world-class supercomputing infrastructure and a competitive innovation ecosystem in supercomputing technologies, applications and skills by coordinating the efforts of its member states and share resources, has assigned one of the 3 Precursor to Exascale system to CINECA. Building on that, the Round Table’s participants presented the contribution of Italian-based institutions and enterprises towards the maximization of the results achieved through exascale-class systems both from the scientific and research point of view as well as from the industrial point of view. The current status of R&D in Italy specifically for the development of components for exascale-class systems was addressed, including the role of Italian institutions and enterprises in the European Processor Initiative (EPI) consortium, and which synergies among the key players could create a native Italian ecosystem fully aligned within the EuroHPC JU and EPI initiatives for enabling exascale-class systems to support scientific leadership and industrial competitiveness.

The academic participants presented their research lines and their previous engagement and contributions to EU programs, covering a wide spectrum of research fields and technological implementation. Andrea Bartolini (UniBO) presented the goals of the EPI, the members of the consortium and the roadmap for the processor, the accelerator and the automotive components, and highlighted the role of University of Bologna in the development of key components of the EPI project. Fabrizio Magugliani (E4 computer Engineering) presented the role of E4 in the development of key components of the EPI projects such as the PCIe daughter board hosting the EPI processor as Software Development Vehicle. The presentation opened a healthy discussion about how the community of Italian researchers could leverage the EPI project bringing the results of their research and therefore adding value to the project.

EPI First tutorial called “First steps towards a made-in-Europe high-performance microprocessor” was held on July 17th, at the Universita Politècnica de Catalunya, co-located with the ACM 2019 Summer school on HPC architectures for AI and dedicated applications. Andrea Bartolini presented the introductory section, covering several aspects of the HPC processor landscape.

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