Phase 2 Archives - Page 2 of 17 - European Processor Initiative

EPI Consortium members published “Xvpfloat: RISC-V ISA Extension for Variable Extended Precision Floating Point Computation” in the IEEE Transactions on Computers.

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/10488759

DOI: https://doi.org/10.1109/TC.2024.3383964

EPI Consortium members published “Sparse Matrix-Vector Multiplication Based on Online Arithmetic” in the IEEE Access.

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/abstract/document/10559968

DOI: https://doi.org/10.1109/ACCESS.2024.3416395

EPI Consortium members published “Accelerating Variants of the Conjugate Gradient with the Variable Precision Processor” at 2022 IEEE 29th Symposium on Computer Arithmetic (ARITH).

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/abstract/document/9974436

DOI: https://doi.org/10.1109/ARITH54963.2022.00017

EPI Consortium members published “OpenHW CORE-V High-Performance, Out-of-Order, L1 Data Cache (HPDCache)” at 20th ACM International Conference on Computing Frontiers (CF’23).

Here you can find a link to an open access version of the article: https://cea.hal.science/cea-04110679

DOI: https://doi.org/10.1145/3587135.3591413

What We Know about Alice Recoque, Europe’s Second Exascale System

EPI Consortium members published “Short Reasons for Long Vectors in HPC CPUs: A Study Based on RISC” at SC-W ’23: Proceedings of the SC ’23 Workshops of The International Conference on High Performance Computing, Network, Storage, and Analysis.

Here you can find a link to an open access version of the article: https://arxiv.org/abs/2309.06865

DOI: https://doi.org/10.1145/3624062.3624231

EPI Consortium members published “Leveraging Mixed-Precision CNN Inference for Increased Robustness and Energy Efficiency” at 2023 IEEE 36th International System-on-Chip Conference (SOCC).

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/10256738

DOI: doi.org/10.1109/SOCC58585.2023.10256738

EPI Consortium members published “COMPESCE: A Co-design Approach for Memory Subsystem Performance Analysis in HPC Many-Core” at Architecture of Computing Systems (ARCS 2023) .

Here you can find a link to an open access version of the article: https://juser.fz-juelich.de/record/1019434

DOI: https://doi.org/10.1007/978-3-031-42785-5_8

EPI Consortium members published “Software Development Vehicles to Enable Extended and Early Co-design: A RISC-V and HPC Case of Study” at ISC High Performance 2023: High Performance Computing.

Here you can find a link to an open access version of the article: https://arxiv.org/abs/2306.01797

DOI: https://doi.org/10.1007/978-3-031-40843-4_39

Presentation from the conference is also available below in .pdf.

EPI Consortium members published “Supporting RISC-V Performance Counters Through Linux Performance Analysis Tools” at 2023 IEEE 34th International Conference on Application-specific Systems, Architectures and Processors (ASAP).

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/abstract/document/10265733

DOI: 10.1109/ASAP57973.2023.00027

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