César Fuguet-Tortolero from CEA held a presentation titled: “VRP/VXP: VaRiable eXtended Precision RISC-V Accelerator for High-Precision” at Spring 2022 RISC-V Week.

Matheus Cavalcante (ETHZ) held a presentation titled: “The RISC-V based Stencil Tensor Accelerator of EPI” at Spring 2022 RISC-V Week.

Francesco Minervini from BSC held a presentation titled: “Vitruvius: An Area-Efficient RISC-V Decoupled Vector Accelerator for High Performance Computing” at Spring 2022 RISC-V Week.

Jesus Labarta from BSC held a presentation titled: “The Accelerator Tile of European Processor Initiative” at Spring 2022 RISC-V Week.

Andrea Bartolini from UNIBO held a presentation titled “RISC-V based Power Management Unit for an HPC processor” at Spring 2022 RISC-V Week.

 

Roger Ferrer from BSC held a presentation titled “SW Toolchain for RISC-V Vector Extensions” at Spring 2022 RISC-V Week.

 

Daniele Cesarini from CINECA held a presentation titled “Microarchitecture performance assessment and energy monitoring of MaX codes through Linux Perf and power management API interfaces.”

Daniele Cesarini from CINECA held a presentation titled “Performance Assessment and Energy Efficiency of MaX Codes” at ISC22.

Luís Crespo, Pedro Tomás, Nuno Roma and Nuno Neves held a presentation titled “Unified Posit/IEEE-754 Vector MAC Unit for Transprecision Computing.”

SiPearl Emerging as Heavyweight for ‘Made in Europe’ Chips

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