Interview with Philippe Notton and Stéphane Requena
This year’s ApplePies was virtual. EPI’s Sergio Saponara was General Chair, while John Davis from BSC gave a keynote titled “RISC-V, Enabling a Wide Open Future of HPC”.
SiPearl Says Rhea Exascale Chip Has Entered Accelerated Simulation Phase for 2022 Launch
Prof. Jürgen Becker from KIT attended the IEEE CASS Rio Grande do Sul Chapter talks and gave a lecture titled Multi-Core System Integration – Distributed HPC, Reliability, AI and Open Hardware as Enablers, which can be viewed here: https://www.youtube.com/watch?v=VHl5UdSFe4E
EPI partners participated in a panel session of the DVCon Europe 2020, titled Verification Challenges of an Exascale Supercomputer. Session video is available at EPI YT Channel: https://youtu.be/o5S1mcNpQMA
Roger Espasa attended the RISC-V Summit and held a presentation titled “Introducing SemiDynamics High Bandwidth RISC V IP Cores”. Video of the presentation is available at RISC-V YouTube channel: https://www.youtube.com/watch?v=QojwA_cQTJo
EPI Consortium members published “Cross-level co-simulation and verification of an automatic transmission control on embedded processor” in the Software Engineering and Formal Methods. SEFM2020 Collocated Workshops.
Here you can find a link to an open access version of the article:
https://arpi.unipi.it/retrieve/handle/11568/1082839/692127/CoSim-CPS2020.pdf
DOI: https://doi.org/10.1007/978-3-030-67220-1_20
Project press release, published on March 9, 2021, is also available in the news section:
https://www.european-processor-initiative.eu/epi-epac1-0-risc-v-core-boots-linux-on-fpga/
SiPearl and Open-Silicon Research Collaborate to Accelerate Custom Silicon for HPC Applications
EPI Consortium members published “Novel Arithmetics in Deep Neural Networks Signal Processing for Autonomous Driving: Challenges and Opportunities” in the IEEE Signal Processing Magazine.
Here you can find a link to an open access version of the article: