Greek institute pioneers cutting-edge EU chip technology

EPI Consortium members published “PIugSMART: a pluggable open-source module to implement multihop bypass in networks-on-chip” in NOCS ’21: Proceedings of the 15th IEEE/ACM International Symposium on Networks-on-Chip.

Here you can find a link to an open access version of the article: https://dl.acm.org/doi/10.1145/3479876.3481601.

DOI: https://doi.org/10.1145/3479876.3481601.

EPI Consortium members published “gem5 + rtl: A Framework to Enable RTL Models Inside a Full-System Simulator” in ICPP 2021: 50th International Conference on Parallel Processing.

Here you can find a link to an open access version of the article: https://dl.acm.org/doi/10.1145/3472456.3472461.

DOI: https://doi.org/10.1145/3472456.3472461.

Benoît Dupont de Dinechin from Kalray held a presentation titled “Co-Design of the Kalray Manycore Accelerator for Edge Computing.”

EPI Consortium members published “A 10-core SoC with 20 Fine-Grain Power Domains for Energy-Proportional Data-Parallel Processing over a Wide Voltage and Temperature Range” in ESSCIRC 2021 – IEEE 47th European Solid State Circuits Conference (ESSCIRC).

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/9567755.

DOI: https://doi.org/10.1109/ESSCIRC53450.2021.9567755.

EPI partners E4 and the University of Pisa participated in the workshop on EuroHPC review and related participation in Tuscany.

The result of the workshop was a technical report (in Italian).

EPI Consortium members published “A Lightweight Posit Processing Unit for RISC-V Processors in Deep Neural Network Applications” in IEEE Transactions on Emerging Topics in Computing.

Here you can find a link to an open access version of the article: https://ieeexplore.ieee.org/document/9583876.

DOI: https://doi.ieeecomputersociety.org/10.1109/TETC.2021.3120538.

Per Stenström from Chalmers held a presentation titled “Microarchitecture Research: The View from the Globe.”

El BSC dissenya un xip de codi obert que triplica la velocitat del seu antecessor

La UPC y el Barcelona Supercomputing Centre desarrollan un chip importante para avanzar hacia la soberanía tecnológica europea

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